In traditional computer architecture, the size of a word is an important characteristic since the instruction set and/or hardware of the processor handle data in chunks equal to the word size. Consequently, the majority of the registers in a processor are predominantly word sized and the largest chunk of data which can be transported from/to memory in a single operation is word sized. The information within a data word may contain some bits which are critical and other bits which are non-critical. Critical bits are bits which are usually processed first by a consuming unit, such as a processor, when it reads/processes a data word. In traditional computer architecture, both critical bits and non-critical bits are usually stored in the same memory array, resulting in various performance, power, and cost constraints. Thus, there is a need for ways to efficiently store and access the critical bits and non-critical bits of a word to increase performance, reduce power consumption, and reduce costs.